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Microchip Technology /ATSAML11E16A /MPU /MPU_CTRL

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Interpret as MPU_CTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ENABLE)ENABLE 0 (HFNMIENA)HFNMIENA 0 (PRIVDEFENA)PRIVDEFENA

Description

MPU Control Register

Fields

ENABLE

MPU enable
HFNMIENA

HardFault, NMI enable
PRIVDEFENA

Privileged default enable

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data